1. Field of the Invention
The present invention is generally directed to memory, and more particularly to providing a semiconductor memory array having a number of non-volatile Static Random Access Memory (nvSRAM) cells as well as a number of Static Random Access Memory (SRAM) cells coupled together in a single array.
2. The Relevant Technology
Semiconductor memory devices are widely used in the computer and electronics industries as a means for retaining digital information. A typical semiconductor memory device is comprised of a large number of memory elements, known as memory cells, that are each capable of storing a single digital bit. The memory cells are arranged into a plurality of separately addressable memory locations, each being capable of storing a predetermined number of digital data bits. All of the memory cells in the device are generally located upon a single semiconductor chip which is contacted and packaged for easy insertion into a computer system.
There are several types of semiconductor memory devices, typically arranged in a number of rows and columns in an array. There are no known semiconductor arrays having a combination of non-volatile memory cells and volatile memory cells in a single array. More specifically, SRAM cell arrays are well known in the art, as are arrays of non-volatile SRAM cells. However, SRAM cells and non-volatile SRAM cells have not been combined together to form a single array of SRAM cells and non-volatile SRAM cells. Moreover, there is nothing to motivate one skilled in the art to combine the two types into a single array, since the use and operation of the two is significantly different. It would therefore be advantageous to provide a semiconductor array having a combination of non-volatile SRAM cells and SRAM cells in a single device array.